1. Field of the Invention
The present invention relates to a semiconductor device having an element isolating region and a method of manufacturing the semiconductor device.
2. Description of the Related Art
For the purpose of improving integration of a semiconductor integrated circuit or the like, a trench structure has been used as an element isolating region for electrically isolating a plurality of element regions from each other on a semiconductor substrate, as described in Japanese Patent Application Publication No. 10-56059 (Patent Document 1), for example. Besides, it has been known that a leakage current between a source and a drain in a MOS transistor is reduced by forming a gate electrode so that an edge side of the gate electrode is placed on the element isolating region, as described in Japanese Patent Application Publication No. 2010-40896 (Patent Document 2), for example.
However, in a case where the element isolating region is formed to have an extremely small width in the trench structure for further improving integration, some problematic states are expected: a state where the edge side of the gate electrode is not placed on the element isolating region due to the manufacturing error of the edge side of the gate electrode and therefore a leakage current between the source and the drain cannot be reduced, a state where adjacent gate electrodes are overlapped each other on the element isolating region with the result that a short circuit occurs between the adjacent gate electrodes, and so on.